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| NLU1GT50 Single Buffer, Non-Inverting, TTL Level TTL-Compatible Inputs The NLU1GT50 MiniGatet is an advanced CMOS high-speed non-inverting buffer in ultra-small footprint. The device input is compatible with TTL-type input thresholds and the output has a full 5.0 V CMOS level output swing. The NLU1GT50 input and output structures provide protection when voltages up to 7.0 V are applied, regardless of the supply voltage. Features 1 ULLGA6 1.0 x 1.0 CASE 613AD http://onsemi.com MARKING DIAGRAMS UDFN6 MU SUFFIX CASE 517AA LM * * * * * * * * * Designed for 1.65 to 5.5 V VCC Operation High Speed: tPD = 3.5 ns (Typ) @ VCC = 5.0 V Low Power Dissipation: ICC = 1 mA (Max) at TA = 25C TTL-Compatible Input: VIL = 0.8 V; VIH = 2.0 V, VCC = 5.0 V CMOS-Compatible Output: VOH > 0.8 VCC; VOL < 0.1 VCC @ Load Power Down Protection Provided on inputs Balanced Propagation Delays Ultra-Small Packages These are Pb-Free Devices LM 1 1 ULLGA6 1.2 x 1.0 CASE 613AE LM ULLGA6 1.45 x 1.0 CASE 613AF 1 LM NC 1 6 VCC L M = Device Marking = Date Code IN A 2 5 NC PIN ASSIGNMENT 1 GND 3 4 OUT Y 2 3 4 NC IN A GND OUT Y NC VCC Figure 1. Pinout (Top View) 5 6 IN A 1 OUT Y A FUNCTION TABLE Y L H L H Figure 2. Logic Symbol ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 4 of this data sheet. (c) Semiconductor Components Industries, LLC, 2008 1 March, 2008 - Rev. 2 Publication Order Number: NLU1GT50/D NLU1GT50 MAXIMUM RATINGS Symbol VCC VIN VOUT IIK IOK IO ICC IGND TSTG TL TJ MSL FR VESD DC Supply Voltage DC Input Voltage DC Output Voltage DC Input Diode Current DC Output Diode Current DC Output Source/Sink Current DC Supply Current Per Supply Pin DC Ground Current per Ground Pin Storage Temperature Range Lead Temperature, 1 mm from Case for 10 Seconds Junction Temperature Under Bias Moisture Sensitivity Flammability Rating Oxygen ESD Withstand Voltage Index: 28 to 34 Human Body Model (Note 2) Machine Model (Note 3) Charged Device Model (Note 4) VIN < GND VOUT < GND Parameter Value -0.5 to +7.0 -0.5 to +7.0 -0.5 to +7.0 -20 20 12.5 25 25 -65 to +150 260 150 Level 1 UL 94 V-0 @ 0.125 in > 2000 > 200 N/A 500 V Unit V V V mA mA mA mA mA C C C ILATCHUP1 Latchup Performance Above VCC and Below GND at 125 C (Note 5) mA Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Measured with minimum pad spacing on an FR4 board, using 10 mm-by-1 inch, 2 ounce copper trace no air flow. 2. Tested to EIA / JESD22-A114-A. 3. Tested to EIA / JESD22-A115-A. 4. Tested to JESD22-C101-A. 5. Tested to EIA / JESD78. RECOMMENDED OPERATING CONDITIONS Symbol VCC VIN VOUT TA Dt/DV Positive DC Supply Voltage Digital Input Voltage Output Voltage Operating Free-Air Temperature Input Transition Rise or Fall Rate VCC = 3.3 V 0.3 V VCC = 5.0 V 0.5 V Parameter Min 1.65 0 0 -55 0 0 Max 5.5 5.5 5.5 +125 100 20 Unit V V V C ns/V http://onsemi.com 2 NLU1GT50 DC ELECTRICAL CHARACTERISTICS TA = 25 5C Symbol VIH Parameter Low-Level Input Voltage Conditions VCC (V) 1.65 to 2.29 2.3 to 2.99 3.0 4.5 to 5.5 VIL Low-Level Input Voltage 1.65 to 2.29 2.3 to 2.99 3.0 4.5 to 5.5 VOH High-Level Output Voltage VIN = VIH or VIL IOH = -50 mA 1.65 to 2.99 3.0 4.5 VIN = VIH or VIL IOH = -4 mA IOH = -8 mA VOL Low-Level Output Voltage VIN = VIH or VIL IOL = 50 mA 3.0 4.5 1.65 to 2.99 3.0 4.5 VIN = VIH or VIL IOL = 4 mA IOL = 8 mA IIN Input Leakage Current Quiescent Supply Current Quiescent Supply Current Output Leakage Current 0 = VIN = 5.5 V 3.0 4.5 0 to 5.5 VCC- 0.1 2.9 4.4 2.58 3.94 0 0 0 0.1 0.1 0.1 0.36 0.36 0.1 3.0 4.5 Min 0.50 x VCC 0.45 x VCC 1.4 2.0 0.10 x VCC 0.15 x VCC 0.53 0.8 VCC- 0.1 2.9 4.4 2.48 3.80 0.1 0.1 0.1 0.44 0.44 1.0 Typ Max TA = +855C Min 0.50 x VCC 0.45 x VCC 1.4 2.0 0.10 x VCC 0.15 x VCC 0.53 0.8 VCC- 0.1 2.9 4.4 2.34 3.66 0.1 0.1 0.1 0.52 0.52 1.0 mA V 0.10 x VCC 0.15 x VCC 0.53 0.8 V V Max TA = -555C to +1255C Min Max Unit V ICC 0 = VIN = VCC 5.5 1.0 20 40 mA ICCT VIN = 3.4 V 5.5 1.35 1.50 1.65 mA IOPD VOUT = 5.5 V 0.0 0.5 5.0 10 mA http://onsemi.com 3 NLU1GT50 AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0 n) TA = 25 5C Min Typ Max 16.6 13.3 19.5 4.5 6.3 3.5 4.3 5 5.0 12 10.0 13.5 6.7 7.7 10 TA = +855C Min Max 18.0 14.5 22.0 11.0 15.0 7.5 8.5 10 TA = -555C to +1255C Min Max 22.0 17.5 25.5 13.0 17.5 8.5 9.5 10.0 pF pF Unit ns Symbol tPLH, tPHL Parameter Propagation Delay, Input A to Output Y VCC (V) 1.65 to 1.95 2.3 to 2.7 Test Condition CL = 15 pF CL = 15 pF CL = 50 pF 3.0 to 3.6 CL = 15 pF CL = 50 pF 4.5 to 5.5 CL = 15 pF CL = 50 pF CIN CPD Input Capacitance Power Dissipation Capacitance (Note 6) 6. CPD is defined as the value of the internal equivalent capacitance which is calculated from the dynamic operating current consumption without load. Average operating current can be obtained by the equation ICC(OPR) = CPD * VCC * fin + ICC. CPD is used to determine the no-load dynamic power consumption: PD = CPD * VCC2 * fin + ICC * VCC. A 50% GND tPLH Y 50% VCC VOL tPHL VOH VCC Figure 3. Switching Waveforms TEST POINT OUTPUT DEVICE UNDER TEST CL * *Includes all probe and jig capacitance Figure 4. Test Circuit ORDERING INFORMATION Device NLU1GT50MUTCG NLU1GT50AMX1TCG NLU1GT50BMX1TCG NLU1GT50CMX1TCG Package UDFN6 (Pb-Free) ULLGA6, 1.45 x 1.0, 0.5P (Pb-Free) ULLGA6, 1.2 x 1.0, 0.4P (Pb-Free) ULLGA6, 1.0 x 1.0, 0.35P (Pb-Free) Shipping 3000 / Tape & Reel 3000 / Tape & Reel 3000 / Tape & Reel 3000 / Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 4 NLU1GT50 PACKAGE DIMENSIONS UDFN6, 1.2x1.0, 0.4P CASE 517AA-01 ISSUE C EDGE OF PACKAGE D A B L1 PIN ONE REFERENCE 2X E 0.10 C 2X DETAIL A Bottom View (Optional) EXPOSED Cu MOLD CMPD NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.25 AND 0.30 mm FROM TERMINAL. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. MILLIMETERS MIN MAX 0.45 0.55 0.00 0.05 0.127 REF 0.15 0.25 1.20 BSC 1.00 BSC 0.40 BSC 0.30 0.40 0.00 0.15 0.40 0.50 0.10 C (A3) A A1 10X 0.08 C SIDE VIEW A1 5X 1 3 SEATING PLANE C L L2 6X b 0.10 C A B 0.05 C NOTE 3 6 4 e BOTTOM VIEW http://onsemi.com 5 EEE EEE EEE 0.10 C EEE EEE EEE TOP VIEW A3 DETAIL B Side View (Optional) DIM A A1 A3 b D E e L L1 L2 MOUNTING FOOTPRINT* 6X 0.42 6X 0.22 0.40 PITCH 1.07 DIMENSIONS: MILLIMETERS *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. NLU1GT50 PACKAGE DIMENSIONS ULLGA6 1.0x1.0, 0.35P CASE 613AD-01 ISSUE A D A B NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.30 mm FROM THE TERMINAL TIP. 4. A MAXIMUM OF 0.05 PULL BACK OF THE PLATED TERMINAL FROM THE EDGE OF THE PACKAGE IS ALLOWED. DIM A A1 b D E e L L1 SEATING PLANE MILLIMETERS MIN MAX --0.40 0.00 0.05 0.12 0.22 1.00 BSC 1.00 BSC 0.35 BSC 0.25 0.35 0.30 0.40 PIN ONE REFERENCE 0.10 C 0.10 C 0.05 C 6X 0.05 C L1 0.53 6 4 6X EE EE EE 1 E TOP VIEW A SIDE VIEW A1 e 5X 3 MOUNTING FOOTPRINT SOLDERMASK DEFINED* 5X C 0.48 6X 0.22 L NOTE 4 1.18 1 PKG OUTLINE 0.35 PITCH DIMENSIONS: MILLIMETERS b 0.10 C A B 0.05 C NOTE 3 BOTTOM VIEW *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 6 NLU1GT50 PACKAGE DIMENSIONS ULLGA6 1.2x1.0, 0.4P CASE 613AE-01 ISSUE A D A B NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.30 mm FROM THE TERMINAL TIP. 4. A MAXIMUM OF 0.05 PULL BACK OF THE PLATED TERMINAL FROM THE EDGE OF THE PACKAGE IS ALLOWED. DIM A A1 b D E e L L1 SEATING PLANE MILLIMETERS MIN MAX --0.40 0.00 0.05 0.15 0.25 1.20 BSC 1.00 BSC 0.40 BSC 0.25 0.35 0.35 0.45 PIN ONE REFERENCE 0.10 C 0.10 C 0.05 C 6X 0.05 C L1 1 PKG OUTLINE EE EE EE 1 6 E TOP VIEW A SIDE VIEW A1 C MOUNTING FOOTPRINT SOLDERMASK DEFINED* 5X 0.49 e 5X 6X 0.26 L NOTE 4 3 1.24 0.53 4 6X b 0.10 C A B 0.05 C NOTE 3 0.40 PITCH DIMENSIONS: MILLIMETERS BOTTOM VIEW *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 7 NLU1GT50 PACKAGE DIMENSIONS ULLGA6 1.45x1.0, 0.5P CASE 613AF-01 ISSUE A D A B NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.30 mm FROM THE TERMINAL TIP. 4. A MAXIMUM OF 0.05 PULL BACK OF THE PLATED TERMINAL FROM THE EDGE OF THE PACKAGE IS ALLOWED. DIM A A1 b D E e L L1 MILLIMETERS MIN MAX --0.40 0.00 0.05 0.15 0.25 1.45 BSC 1.00 BSC 0.50 BSC 0.25 0.35 0.30 0.40 PIN ONE REFERENCE 0.10 C 0.10 C 0.05 C 6X 0.05 C L1 1 PKG OUTLINE MiniGate is a trademark of Semiconductor Components Industries, LLC (SCILLC). ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81-3-5773-3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative EEE EEE EEE 1 6 E TOP VIEW A SIDE VIEW A1 e 5X 3 SEATING PLANE MOUNTING FOOTPRINT SOLDERMASK DEFINED* 5X C 0.49 6X 0.30 L NOTE 4 1.24 0.53 4 6X b 0.10 C A B 0.05 C NOTE 3 0.50 PITCH DIMENSIONS: MILLIMETERS BOTTOM VIEW *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 8 NLU1GT50/D |
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